NCP5623BMUTBG【PDF 9/12 页】IC LED DRIVER RGB I2C 12-LLGA

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NCP5623B

trigger another gradual dimming when current gradual

dimming is running. If IEND is set to be lower than start

current level for upward gradual dimming, after gradual

dimming is triggered, LED current will rise from current

level to maximum, drop to zero and start from zero to IEND

then. It’s similar if IEND is higher than start current level for

downward gradual dimming.

The dimming is built with 30 steps and the time delay is

encoded into the second byte of the I 2 C transaction: see

Table 1.

When the gradual dimming is deactivated (B7 = B6 = 0,

B5 = 1), the output current is straightforwardly set up to the

level defined by the contain of the related register upon

acknowledge of the output current byte.

Table 2. BASIC PROGRAMMING SEQUENCES

The gradual dimming sequence must be completed before

a new output current data byte is send to the NCP5623B . At

this point, the brightness sequence takes place when the new

data byte is acknowledged by the internal I 2 C decoder. Since

the six registers are loaded on independent byte flow

associated to the I 2 C address, any parameter of the

NCP5623B chip can be updated ahead of the next function

as depicted in Table 2.

I 2 C Address

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COMMAND Bits[7:0]

000X XXXX

0010 0000

0011 1111

0100 0000

0101 1111

0110 0000

0111 1111

1000 0000

1001 1111

1010 0000

1011 1111

1100 0000

1101 1111

1110 0000

1111 1111

Operation

System Shut Down

Set Up the ILED current

Set Up the PWM1

Set Up the PWM2

Set Up the PWM3

Set Up the IEND Upward

Set Up the IEND Downward

Set Up the Gradual Dimming time

and run the sequence

Note

Bits[4:0] are irrelevant

ILED register

Bits[4:0] contain the IMAX value as defined by the

Iref value

PWM1

Bits[4:0] contain the PWM value

PWM2

Bits[4:0] contain the PWM value

PWM3

Bits[4:0] contain the PWM value

UPWARD

Bits[4:0] contain the IEND value

DWNWRD

Bits[4:0] contain the IEND value

GRAD

Bits[4:0] contain the TIME value

The number of step for a given sequence, depends upon

the start and end output current range: since the IPEAK

value is encoded in the Bits[4:0] binary scale, a maximum

of 31 steps is achievable during a gradual dimming

operation.

The number of steps will be automatically recalculated by

the chip according to the equation:

Nstep = | existing step position ? new step position |

As an example, assuming the previously programmed

step was 5 and the new one is 15, then we will have 10 steps

to run between the actual location to the end value. If the

timing was set at 16 ms, the total gradual dimming sequence

will be 160 ms.

To select the direction of the gradual dimming (either

Upward or Downward), one shall send the appropriate

register before to activate the sequence as depicted below:

1010 1111 3 1110 0011 3 select an UPWARD sequence

with 24 ms/step, the end IPEAK current being (IREF *

2400) / (31 ? 16) mA.

1100 0001 3 1110 0100 3 select the DOWNWARD

sequence with 32 ms/step, the end IPEAK current being

(IREF * 2400) / (31 ? 1) mA.

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